On the 9^th and 10^th of October 2019, the EPIC converged for a technical meeting in Brest, France at partner IMT Atlantique. The aim of this meeting was to discuss technical progress, results, challenges as well as next steps of the project.
On the first day, discussions included ongoing activities and tasks for WP2 "B5G FEC Design" and WP4 "Prototyping/Virtual Hardware Design.” Especially the two upcoming, confidential deliverables about the "Third Design Report" (a description of selected decoding algorithms and corresponding architectures to the level of allowing the planned implementation in WP4), and the deliverable about the "RTL implementation" (a description of the RTL (register transfer level) implementation for each code family corresponding synthesis results) were discussed in more detail. On the second day, partners focused on the upcoming dissemination/communication activities (e.g. the consortium is planning an EPIC workshop in Spring 2020, and several planned scientific publications and participation to conferences (e.g. EuCNC2020)), and on WP3 "Link-Level Simulations and Performance Comparisons." In WP3 there were several technical presentation on newest promising results as well as discussions about the methodology for fair comparison of the 3 different code types (Turbo, LDPC and POLAR codes). The technical meeting has shown that EPIC made large progress in the last months and the focus for the rest of the project is to finalize all the ongoing work and disseminate the results in the correspond communities.